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RAM Identification Lab

Decode a module's printed markings, then match it to what the system actually requires.

Field Guide: JEDEC Decode Table, Pin Counts, ECC (click to expand)

PC-Label to DDR Generation/Speed (JEDEC)

Form Factor Pin Counts by Generation

Other Facts

ECCECC modules carry 9 memory chips per side (or 18 on a dual-rank module) instead of the standard 8. The extra chip stores parity data for error detection/correction. A board must support ECC to use it.
Matched PairsDual-channel requires two (or four) sticks that share generation, speed, AND capacity. Mismatched sticks still boot, but dual-channel bandwidth is lost.
Mixed SpeedsWhen speeds differ, the memory controller runs the whole set at the SLOWEST installed module's speed.
VoltageDDR2 = 1.8V, DDR3 = 1.5V, DDR4 = 1.2V, DDR5 = 1.1V. Each generation's notch position also differs so a module physically cannot be forced into the wrong generation's slot.
Scenario 1 of 6 Identification

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Lab Complete!

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RAM modules correctly matched to system requirements